1. Field of the Invention
The present invention relates to a timing circuit and in particular to a timing circuit for controlling the timing in an asynchronous digital circuit.
2. Related Art
Many systems may require asynchronous signals for optimal operation. For example, a successive approximation register digital to analog converter (SAR DAC) can include one signal that triggers a start operation of the SAR DAC and another signal that triggers operation of a comparator within the SAR DAC. Prior art circuits for generating such asynchronous signals have required excessive area for implementation and/or have provided sub-optimal performance. Therefore, a need arises for a timing circuit that can generate asynchronous signals using minimal area while maximizing speed.